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With double-digit growth in the foreseeable future, flexible printed circuits (FPC), have found a tremendous niche as an enabler for various electronic applications. This trend is expected to drive the need to increase productivity while improving performance and reducing costs. Of course, in order to sell FPC, one must tackle the unenviable task of metalizing these often difficult-to-plate materials. In particular, the deposition of metal on a polyimide film is discussed. When discussing adhesion of a deposited metal to a substrate, one must focus on two distinct but related processes. The first relates to surface preparation conditioning and the second to the deposition of the metal itself.
Preparing the Polyimide Surface
One common theme that electroplaters often here is surface preparation. Materials such as polyimide are prone to low copper adhesion. To mitigate this situation, specially formulated conditioners are employed to provide a surface that is conducive to adhesion. Any surface that one desires to deposit another coating on requires that surface to be activated. Otherwise, defects (Figure 1) are often found. Generally these defects include:
- Blistering
- Peeling
- Voids
One critical step in the process sequence is to utilize a conditioning agent (prior to electroless copper metallization) that makes the polyimide material more susceptible to adhesion of the palladium catalyst. In turn, the conditioning agent enhances the adhesion of the subsequently plated copper to the polyimide.
As is often the case, electroless copper plating process systems include a second conditioning step after polyimide etch. While this author recommends such a step, it is with reservation. Basically, the second conditioning step must contain materials that are free rinsing so as to not leave a film on the polyimide. Such a film may lead to a barrier that reduces adhesion of the copper deposit. Should such a situation arise, the fabricator would be better served to run a performance test with no extra conditioner, one with 50% of the recommended concentration, and one test with the full recommendation. Then after plating, perform a tape test to quantify the adhesion, or lack thereof.
Electroless Copper Deposition
The importance of the conditioning step not withstanding, total success is not achievable without a low stress electroless copper deposit. Typically, deposited metals exhibiting a high degree of internal stress find it necessary to “pullaway” from the substrate in order to relieve the stress condition.
The literature reviews and basic research studies provide evidence that the grain structure of the copper deposit influences the deposit’s adhesion to the copper interconnect.
Microsections taken from test boards processed in different electroless copper process formulations show vastly varying structures. As shown in Figure 2, the structure is one that is considered a finely grained crystal structure that appeared “loose.” From multiple testing programs, this type of structure was more prone to hole wall pullaway and over all poor adhesion.
In Figure 3, the structure shown has a high correlation to good interconnect reliability, as determined by IST and thermal shock testing. In addition, this type of deposit structure exhibited very low stress and provides excellent adhesion when subjected to tape testing. It is highly recommended that for flex circuit applications, especially dynamic flex, maximum adhesion of the copper to the substrate be achieved. Further, the data supports the assertion that a low- to medium-deposition electroless copper process be employed for flexible circuit manufacturing. These types of electroless copper processes typically provide a low stress deposit with a fairly large grain structure.
This is not to say that direct metallization processes are not compatible to flex circuit fabrication. On the contrary, direct metalization is very proficient with respect to flex and will be reviewed in a future post.
About the Author:
Michael Carano is with RPB Chemical Technology. He has been involved in the PWB, general metal finishing photovoltaic industries for nearly 30 years and is currently co-chair of the IPC Technology Roadmap Executive Committee. Carano holds nine U.S. patents in topics including plating, metallization processes and PWB fabrication techniques. He was inducted into the IPC Hall of Fame in 2014 and has been a regular contributor to various industry publications throughout his career.
