There is no denying that additive manufacturing processes have been gaining popularity over the past several years. We have additive manufacturing conferences, journals, and no end to continued research and development. Additive electronics, a segment of this technology, has also been growing in popularity, and there are several alternatives on the market that cater to quick-turn, prototype, and PCB options.
Digging down into the additive electronics market, there is another important segment that is starting to build momentum: the fabrication of feature sizes bridging subtractive etch processing capabilities and IC-scale technology. Fully additive, semi-additive (SAP), or modified semi-additive processes (mSAP) enable fabricators to create PCBs, on flex or rigid materials, with much finer feature sizes than the traditional subtractive etch processes can manufacture while also working with larger panel sizes than typical IC fabrication. While the concept of additive electronics is not new, it is new technology in terms of PCB manufacturing.
I have been involved with additive electronics for the past several years, and I have seen the discussion of and demand for sub-75-micron feature sizes slowly grow. Conversations, questions, and research about SAP and mSAP increased significantly when it was announced that the mSAP process was used to create the circuitry in the more recent versions of our smartphones. While this process is available in very high volume in some areas of the world, it is still in the early stages of development in other areas.
In smartphone applications, it is easy to see the benefit of 35-micron line and space and the ability to shrink the circuit size to allow space for a larger battery and more sophisticated electronics. As a smartphone user, I know I appreciate that larger battery! But even outside of the high-volume smartphone market, there is an increased interest in the ability to design with feature sizes below 75 microns and, along with that, there is an increased interest in what options are available in low-volume and development quantities to achieve this. While working with the SMTA to help develop a new conference launching this fall, “Additive Electronics: PCB Scale to IC Scale,” it has be-come clear that the industry is at an inflection point. Increasingly sophisticated electronics in smaller and lighter-weight packaging will continue to drive the need to deliver finer feature sizes, leaving designers with the need to identify potential solutions and provide fabricators with the opportunity to bring in new capabilities to meet this need.
One of the forerunners in this technology advancement is Averatek’s A-SAP process. Averatek has created a liquid metal ink (LMI) and semi-additive manufacturing processes that are capable of achieving feature sizes from 75 down to 5 microns. This technology is available for license to PCB facilities and fits well with traditional PCB manufacturing equipment. Currently, the A-SAP process is being piloted in two PCB fabrication facilities and will be commercially available over the next few months.
To read this entire column, which appeared in the October 2019 issue of PCB007 Magazine, click here.