“Additive electronics” is a broad term in our industry. To many, this suggests 3D printing and the processes used to form circuit patterns with these additive methods. To others, this term conjures the image of newer PCB fabrication techniques that use semi-additive PCB fabrication processes to realize line width and space below the traditional 75-micron (3-mil) capabilities that are typically seen with subtractive etch processing. While both have interesting applications, the latter technology is the focus for this column. Recently, having the opportunity to attend two different sessions focused on additive electronics has driven home the fact that this technology is rapidly gaining momentum outside of the traditional high volume smartphone market, and is being adopted by several PCB fabricators offering low volume/high mix. Both events were very well attended, and these fabrication advancements are clearly catching the attention of the PCB design community.
For those new to these PCB technology advances, let’s start with a few definitions:
- Subtractive etch process: Traditional process used to fabricate printed circuit boards. This process begins with copper-clad laminate, which is masked and etched (copper is subtracted) to form traces
- Additive PCB fabrication: Starting with bare dielectric, this process utilizes additive process steps, rather than subtractive process steps to form traces
- mSAP: Modified, semi-additive process, adopted from IC fabrication practices
- SAP: Semi-additive process, adopted from IC fabrication practices
- SLP: Substrate-like PCB, a PCB using mSAP or SAP technology instead of subtractive etch technology
While semi-additive processes are commonly used in IC substrate fabrication, they are a new process to the PCB fabrication community. As this technology is adapted to and integrated into PCB manufacturing, this has the potential to fill a gap between IC fabrication and PCB fabrication capabilities. In an arguably overly simplistic light, IC manufacturing processes are limited in overall panel size, and subtractive etch PCB fabrication is limited in line width and spacing capabilities. Blending these two worlds brings finer feature sizes to the PCB design community on larger panels (and lower cost) than IC fabrication allows.
To add a little color to the difference between SAP and mSAP in a PCB manufacturing environment, both SAP and mSAP processing start with the core dielectric and a thin layer of copper. A common differentiation between the two processes is the thickness of the seed copper layer. Generally, SAP processing begins with a thin electroless copper coating (less than 1.5 mm) and mSAP begins with a thin laminated copper foil (greater than 1.5 mm). There are multiple ways to approach this technology and decisions can be based on volume requirements, costs, capital investment needed, and process knowledge.
Two recent events highlighted this process: A webinar with PCEA’s Orange County chapter where American Standard Circuits and Averatek presented on ASC’s newly installed A-SAP process (Averatek’s semi-additive process) and via fill options; and an SMTA-hosted session on additive electronics, which provided information from IDTechEx on the state of additive electronics and an open discussion polling audience members to structure the technical program for February’s Additive Electronics TechXchange being hosted in San Jose. I am inspired by the discussion at both events and extremely interested in the questions that are being asked as people familiarize themselves with these new technologies and the impacts of finer feature sizes on PCB design.
It is intuitive to first look at the obvious advantages to increased circuit density: overall size reduction, potential layer count reduction, potential microvia layer reduction, and lamination cycle reduction, just to get started.
Beyond this, there were some common questions bubbling up from those curious attendees:
- What is the peel strength of additive copper compared to traditional laminate?
- What materials are these processes compatible with?
- Can these additive processes come from plated through-holes or only build-up construction?
- Can additive layers and subtractive layers be combined in the same stackup?
- Can additive processes and subtractive processes be used on the same layer?
- Who is currently implementing these processes in their PCB manufacturing locations?
- Can you use via-in-pad-plated-over technology with additive traces?
- What thickness of copper can be achieved with semi-additive PCB processes?
- What is the impact on impedance?
- What is the impact on insertion loss and crosstalk?
- Which EDA tools support this?
- What are the impacts to assembly?
As the title of this column suggests, are you also curious about the PCB design benefits and impacts associated with these new technology advancements? It is an exciting time as we all come together to better understand how to best apply this technology. I personally believe that we are just starting to scratch the surface in terms of applications and benefits, and I am excited to have the opportunity to dig into these questions in upcoming columns.
What questions do you have regarding additive electronics? Contact me with those questions and I will add them to my growing list of topics to explore.
This column originally appeared in the October 2021 issue of Design007 Magazine.